Use the GigaView Clock Analysis module in concert with the WAVECREST SIA family of signal integrity analysis solutions to perform complete clock analysis in seconds. Test more devices in less time and accelerate time-to-market for your latest innovations. The Clock Analysis module measures period, pulse width, cycle-to-cycle jitter, duty cycle distortion, propagation delay, rise/fall time, and amplitude. It separates random (RJ) and deterministic (DJ) jitter, and quantifies the magnitude and frequency of periodic modulations.

GigaView Clock Analysis enables:

Single Button Simplicity

Summarize the most important timing and voltage measurements in one easy to use tool. The clock analysis tool provides amplitude, period, RJ, DJ, TJ, PJ, Duty Cycle, and Frequency.

Debug and Characterization

Multiple diagnostic tools allow you to find the specific cause of many signal integrity problems. Crosstalk, Simultaneous Switching Outputs, PLL dividers, Skew, Propagation delay, or the effect of Temperature or Vcc over time.

PLL Analysis unsurpassed by any other instrument

Powerful algorithms allow you to measure the output of a 2nd order PLL without a separate external stimulus or complicated setup. Results provide Transfer Function, Bode Plot, Poles and Zero, Damping Factor, Natural Frequency, PSD of Noise, Lock Range, Lock-in Time, Pull-in Time, Pull-out Range and Noise Bandwidth.

New Tools Make PLL Analysis Easy!

Devices and systems are exceeding 1GHz operating frequency forcing tighter constraints on timing margins. To keep all of the critical elements in sync, system designers are relying heavily on precision PLL circuits to provide quality timing-reference.

By increasing our reliance on PLL devices, we must learn better ways to debug, characterize and test our synchronous systems. The Wavecrest SIA Family is uniquely qualified to debug, characterize and test PLL devices. The SIA Family combines high precision measurement and advanced analysis algorithms with high throughput to provide the most comprehensive PLL analysis solution on the market today.

The SIA Family can measure every critical characteristic of a PLL device including random and deterministic jitter, periodic jitter, adjacent cycle jitter, duty cycle, slew rate, voltage characteristics and PLL loop response.

When a histogram is non-Gaussian, the 1-sigma value is not an accurate representation of Random Jitter(RJ). Using the patented "Tail-Fit" algorithm Separate the components of Random Jitter(RJ) and Deterministic Jitter(DJ) from a histogram.

View the long-term reliability of a signal and calculate the Total Jitter(TJ) at a specific BER or after a certain amount of time.

Once the DJ component has been determined, use the Modulation analysis tool to quantify the Periodic Jitter(PJ). The FFT view shows the Spectral content of the jitter. This view shows only the frequency components of the jitter which allows quick, easy identification of jitter sources.